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cui .com 02/20/2013 1 of 36 series : nqb-d description : fully regulated advanced bus converters features ? quarter-brick with digital pmbus interface 57.9 x 36.8 x 11.3 mm (2.28 x 1.45 x 0.445 in) ? industry standard 5-pins for intermediate bus architectures ? industry-leading power density for telecom and datacom 127~141w / sq. in ? high efficiency, typ. 96.4% at half load, 12 vout ? fully regulated advanced bus converter from 36~75vin ? 2,250 vdc input to output isolation ? fast feed forward regulation to manage line transients ? optional baseplate for high temperature applications ? droop load sharing with 10% current share accuracy ? pmbus revision 1.2 compliant ? 2.9 million hours mtbf ? iso 9001/14001 certified supplier ? ericsson bmr453 & bmr456 compatible model input voltage output voltage output current output wattage (vdc) (vdc) max (a) max (w) nqb-420dwa-an 36~75 12 35 420 nqb-468dma-an 40~60 12 39 468 nqb-415dwb-an 36~75 12.45 35 415 nqb-462dmb-an 40~60 12.45 39 462 general characteristics ? configurable soft start/stop ? precision delay and ramp-up ? voltage margining ? voltage/current/temperature monitoring ? configurable output voltage ? configurable fault response ? power good date page
cui .com date 02/20/2013 page 2 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters nominal output voltage: a = 12.0 v b = 12.45 v c = 9.6 v d = 9.0 v e = 5.0 v part number key nqb- xxx d x x - x x x x - xxx - es x input voltage range: w = wide (36~75 v) m = medium (40~60 v) firmware confguration: 000~zzz base number design output power: 1~999 example part number: nqb-420dwa-an-001 420 w output power, digital pins wide input voltage range, 12.0 v output 5.33 mm pins, negative enable logic frmware revision 001 digital interface load sharing function: d = vout droop pin description: a = 5.33 mm (0.210 in.) b = 4.57 mm (0.180 in.) c = 3.69 mm (0.145 in.) d = 2.79 mm (0.110 in.) s = smt enable logic sense: n = negative logic p = positive logic heatsink option: "blank" = open frame h = heatsink fat l = heatsink lateral fns t = heatsink transverse fns g = heatsink with gnd pin engineering sample: es engineering phase: a~z packaging: 20 converters(through hole pin)/tray, pe foam dissipative 20 converters(surface mount pin)/tray, antistatic ppe contents part number key........................................................2 general information...................................................3 safety specifcation....................................................3 absolute maximum ratings..........................................4 emc specifcation.........................................20 operating information...................................21 thermal consideration..................................24 connections............................................25 pmbus interface...........................................26 mechanical information.................................29 soldering information...................................32 delivery package information.........................33 product qualifcation specifcation...................35 electrical specifcation: 12 v, 35 a, 420 w, 36~75 vin; nqb-420dwa-an....................6 12 v, 39 a, 468 w, 40~60 vin; nqb-468dma-an...................10 12.45 v, 35 a, 415 w, 36~75 vin; nqb-415dwb-an...............14 12.45 v, 39 a, 462 w, 40~60 vin; nqb-420dmb-an...............19
cui .com date 02/20/2013 page 3 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters general information reliability the failure rate () and mean time between failures (mtbf= 1/ ) is calculated at max output power and an operating ambient temperature (t a ) of +40c. cui power modules uses telcordia sr-332 issue 2 method 1 to calculate the mean steady-state failure rate and standard deviation (). telcordia sr-332 issue 2 also provides techniques to estimate the upper confdence levels of failure rates based on the mean and standard deviation. me an steady-st ate fa ilure ra te , std. devi ation, h / s e r u l i a f n 9 . 0 6 h / s e r u l i a f n 1 2 4 mtbf (mean value) for the nqb series = 2.9 mh. mtbf at 90% confdence level = 2.4 mh compatibility with rohs requirements the products are compatible with the relevant clauses and requirements of the rohs directive 2011/65/eu and have a maximum concentration value of 0.1% by weight in homogeneous materials for lead, mercury, hexavalent chromium, pbb and pbde and of 0.01% by weight in homogeneous materials for cadmium. exemptions in the rohs directive utilized in cui power modules products are found in the statement of compliance document. safety specifcation reliability cui power modules dc/dc converters and dc/dc regulators are designed in accordance with the safety standards iec 60950 1, en 60950 1 and ul 60950 1 safety of information technology equipment. iec/en/ul 60950 1 contains requirements to prevent injury or damage due to the following hazards: ? electrical shock ? energy hazards ? fire ? mechanical and heat hazards ? radiation hazards ? chemical hazards on-board dc/dc converters and dc/dc regulators are defned as component power supplies. as components they cannot fully comply with the provisions of any safety requirements without conditions of acceptability. clearance between conductors and between conductive parts of the component power supply and conductors on the board in the fnal product must meet the applicable safety requirements. certain conditions of acceptability apply for component power supplies with limited stand-off (see mechanical information for further information). it is the responsibility of the installer to ensure that the fnal product housing these components complies with the requirements of all applicable safety standards and regulations for the fnal product. component power supplies for general use should comply with the requirements in iec/en/ul 60950 1 safety of information technology equipment . product related standards, e.g. ieee 802.3af power over ethernet , and ets 300132 2 power interface at the input to telecom equipment, operated by direct current (dc) are based on iec/en/ul 60950 1 with regards to safety. cui power modules dc/dc converters and dc/dc regulators are ul 60950 1 recognized and certifed in accordance with en 60950 1. the fammability rating for all construction parts of the products meet requirements for v 0 class material according to iec 60695 11 10, fire hazard testing, test fames C 50 w horizontal and vertical fame test methods. isolated dc/dc converters galvanic isolation between input and output is verifed in an electric strength test and the isolation voltage (v iso ) meets the voltage strength requirement for basic insulation according to iec/en/ul 60950-1. it is recommended to use a slow blow fuse at the input of each dc/dc converter. if an input flter is used in the circuit the fuse should be placed in front of the input flter. in the rare event of a component problem that imposes a short circuit on the input source, this fuse will provide the following functions: ? isolate the fault from the input power source so as not to affect the operation of other parts of the system ? protect the distribution wiring from excessive current and power loss thus preventing hazardous overheating the dc/dc converter output is considered as safety extra low voltage (selv) if one of the following conditions is met: ? the input source has double or reinforced insulation from the ac mains according to iec/en/ ul 60950-1 ? the input source has basic or supplementary insulation from the ac mains and the input of the dc/dc converter is maximum 60 vdc and connected to protective earth according to iec/en/ul 60950-1 ? the input source has basic or supplementary insulation from the ac mains and the dc/dc converter output is connected to protective earth according to iec/en/ul 60950-1 non - isolated dc/dc regulators the dc/dc regulator output is selv if the input source meets the requirements for selv circuits according to iec/ en/ul 60950-1.
cui .com date 02/20/2013 page 4 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters absolute maximum ratings parameter conditions/description min typ max units operating temperature (t p1 ) see thermal consideration section -40 +125 c storage temperature (t s ) -55 +125 c input voltage (v i ) -0.5 +80 +65* v isolation voltage (v iso ) input to output test voltage, see note 1 2250 vdc input voltage transient (v tr ) according to etsi en 300 132-2 and telcordia gr- 1089-core +100 +80* v remote control pin voltage (v rc ) see operating information section -0.3 18 v salert, ctrl, scl, sda, sa0, sa1 (v logic i/o) -0.3 3.6 v stress in excess of absolute maximum ratings may cause permanent damage. absolute maximum ratings, sometimes referred to as no destruction limits, are normally tested with one parameter at a time exceeding the limits of output data or electrical characteristics. if exposed to stress above these limits, function and performance may degrade in an unspecifed manner. note 1: isolation voltage (input/output to base-plate) max 750 vdc. * applies for the narrow input version v i = 40-60 v fundamental circuit diagram -in +in +out -out drive r driver control rc isolatio n auxillary suppl y rc
cui .com date 02/20/2013 page 5 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters functional description t p1 , t p3 = -40 to +90oc, v i = 36 to 75 v, sense pins connected to output pins unless otherwise specifed under conditions. typical values given at: t p1 , t p3 = +25c, v i = 53 v, max i o , unless otherwise specifed under conditions confguration file: 190 10-cda 102 0314/001 parameter conditions/description min typ max units pmbus monitoring accuracy input voltage (vin_read) -2 0.2 2 % output voltage (vout_read) v i = 53v -1.0 0.1 1.0 % output current (iout_read) v i = 53v, 50-100% of max i o v i = 53v, 10% of max i o -6 -0.6 0.15 6 0.6 % a temperature (temp_read) -5 3.5 5 oc fault protection characteristics input under voltage lockout (uvlo) factory default setpoint accuracy hysteresis: factory default hysteresis: confgurable via pmbus of threshold range, note 1 delay -2 0 33 2 300 2 v % v v s output voltage - under voltage protection (vout_uv_fault_ limit) factory default confgurable via pmbus, note 1 fault response time 0 0 200 16 v v s output voltage - over voltage protection (vout_ov_fault_ limit) factory default confgurable via pmbus, note 1 fault response time v out 15.6 200 16 v v s over current protection (ocp) setpoint accuracy (i o ) iout_oc_fault_limit factory default iout_oc_fault_limit, confgurable via pmbus, note 1 fault response time -6 0 41 200 6 100 % a a s over temperature protection (otp) otp_fault_limit, factory default otp_fault_limit, confgurable via pmbus, note 1 hysteresis, factory default hysteresis, confgurable via pmbus, note 1 fault response time -50 0 125 10 300 125 125 oc oc oc oc s logic input/output characteristics logic input low (v il ) ctrl, sa0, sa1, pg, scl, sda 1.1 v logic input high (v ih ) ctrl, sa0, sa1, pg, scl, sda 2.1 v logic output low (v ol ) ctrl, pg, salert, scl, sda i ol = 6 ma 0.25 v logic output high (v oh ) ctrl, pg, salert, scl, sda i oh = -6 ma 2.7 v bus free time t(buf) note 2 1.3 s note 1: see operating information section. 2: pmbus timing parameters according to pmbus spec.
cui .com date 02/20/2013 page 6 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters electrical specifcation 12.0 v, 35 a, 420 w t p1 , t p3 = -40 to +90oc, v i = 36 to 75 v, sense pins connected to output pins unless otherwise specifed under conditions. typical values given at: t p1 , t p3 = +25c, v i = 53 v, max i o , unless otherwise specifed under conditions. additional c out = 3.5 mf, confguration file: 19010-cda 102 0314/001 parameter conditions/description min typ max units input voltage range (v i ) 36 75 v turn-off input voltage (v ioff ) decreasing input voltage 32 33 34 v turn-on input voltage (v ion ) increasing input voltage 34 35 36 v internal input capacitance (c i ) 18 f output power (p o ) 0 420 w effciency () 50% of max i o max i o 50% of max i o , v i = 48 v max i o , v i = 48 v 96.2 95.5 96.4 95.5 % % % % power dissipation (p d ) max i o 19.8 29.5 w input idling power (p li ) i o = 0 a, v i = 53 v 3.3 w input standby power (p rc ) v i = 53 v (turned off with rc) 0.4 w default switching frequency (f s ) 0-100% of max i o 133 140 147 khz output voltage initial setting and accuracy (v oi ) t p1 = +25c, v i = 53 v, i o = 35 a 11.88 12.0 12.12 v output adjust range (v o ) see operating information 4.0 13.2 v output voltage tolerance band (v o ) 0-100% of max i o 11.76 12.24 v line regulation (v o ) max i o 21 55 mv load regulation (v o ) v i = 53 v, 0-100% of max i o 6 40 mv load transient voltage deviation (v tr ) v i = 53 v, load step 25-75-25% of max i o , di/dt = 1 a/s 0.4 v load transient recovery time (t tr ) v i = 53 v, load step 25-75-25% of max i o , di/dt = 1 a/s 150 s ramp-up time (t r ) - (from 10?90% of v oi ) 10-100% of max i o , t p1 , t p3 = 25oc, v i = 53 v 8 ms start-up time (t s ) - (from v i connection to 90% of v oi ) 10-100% of max i o , t p1 , t p3 = 25oc, v i = 53 v 24 ms v i shut-down fall time (t f ) - (from v i off to 10% of v o ) max i o i o = 0 a, c o = 0 mf 3.6 7 ms s rc start-up time (t rc ) max i o 12 ms rc shut-down fall time (t rc ) - (from rc off to 10% of v o ) max i o i o = 0 a, c o = 0 mf 5.1 7 ms s output current (i o ) 0 35 a current limit threshold (i lim ) v o = 10.8 v, t p1 , t p3 < max t p1 , t p3 37 41 44 a short circuit current (i sc ) t p1 , t p3 = 25oc, see note 1 12 a recommended capacitive load (c out ) t p1 , t p3 = 25oc, see note 2 0.1 3.5 6 mf output ripple & noise (v oac ) see ripple & noise section, max i o , see note 3 60 150 mvp-p over voltage protection (ovp) t p1 , t p3 = 25c, v i = 53 v, 10-100% of max i o 15.6 v remote control (rc) sink current (note 4), see operating information trigger level, decreasing rc-voltage trigger level, increasing rc-voltage 2.6 2.9 0.7 ma v v note 1: ocp in hic-up mode 2: low esr-value 3: c out = 100 f, external capacitance 4: sink current drawn by external device connected to the rc pin. minimum sink current required guaranteeing activated rc function.
cui .com date 02/20/2013 page 7 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters ty pical char acteristics 12.0 v, 35 a / 420 w n o i t a p i s s i d r e w o p y c n e i c i f f e 75 80 85 90 95 10 0 05 10 15 20 25 30 35 [a ] [% ] 36 v 48 v 53 v 75 v 0 4 8 12 16 20 24 05 10 15 20 25 30 35 [a ] [w ] 36 v 48 v 53 v 75 v efficiency vs . load current and input vo ltage at t p1 , t p3 = +2 5 c dissipated po we r vs. load current and input vo ltage at t p1 , t p3 = +2 5 c output characteristics current limit characteristics 11.8 11.9 12.0 12.1 12.2 05 10 15 20 25 30 35 [a ] [v ] 36 v 48 v 53 v 75 v 3. 0 5. 0 7. 0 9. 0 11. 0 13. 0 35 37 39 41 43 45 [a ] [v ] 36 v 48 v 53 v 75 v o utput v oltage vs . load current at t p1 , t p3 = +2 5c o utput v oltage vs . load current at i o > max i o , t p1 , t p3 = +25c
cui .com date 02/20/2013 page 8 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters ty pical char acteristics 12.0 v, 35 a / 420 w n w o d - t u h s p u - t r a t s start-up enabled by connecti ng v i at: t p1 , t p3 = +25c, v i = 53 v, i o = 35 a resistiv e load. to p trac e: output vo ltage (5 v/div.). bottom trace: input vo ltage (50 v/div.). ti me scale: (10 ms/div.). shut-dow n enabled by disconnecting v i at: t p1 , t p3 = +25c, v i = 53 v, i o =35 a resisti ve load. to p trac e: output vo ltage (5 v/div.). bottom trace: input vo ltage (50 v/div.). ti me scale: (2 ms/div.) . e s n o p s e r t n e i s n a r t d a o l t u p t u o e s i o n & e l p p i r t u p t u o output vo ltage ripple at: t p1 , t p3 = +25c, v i = 53 v, i o = 35 a resistiv e load . tr ace: output vo ltage (5 0 mv/di v. ). ti me scale: (2 s/div.) . output vo ltage response to load current step-change (8.75-26.25-8.75 a) at: t p1 , t p3 =+25c, v i = 53 v, c o = 3.5 mf . to p trac e: output vo ltage (0.5 v/di v. ). bottom trace: output cu rrent (20 a/div.). ti me scale: (0.5 ms/div.). e s n o p s e r t n e i s n a r t e g a t l o v t u p n i output vo ltage response to input voltage transient at: t p1 , t p3 = +25c, v i = 36-75 v, i o = 17 a resistiv e load, c o = 3.5 mf to p trac e: output vo ltage (2 v/di v. ). bottom trace: input vo ltage (20 v/div.). ti me scale: (0.5 ms/div.).
cui .com date 02/20/2013 page 9 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters ty pical char acteristics 12.0 v, 35 a / 420 w output current derating ? open frame 0 5 10 15 20 25 30 35 02 04 06 08 0 100 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. co nv . av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. output current derating ? base plate thermal resistance ? base plate 0 5 10 15 20 25 30 35 02 04 06 08 01 00 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. con v. 0 1 2 3 4 5 6 0.00 .5 1. 01 .5 2. 02 .5 3.0[ m/ s] [ c/ w] av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. thermal resistance vs . airspeed measured at the conv erter. tested in w ind tunnel wi th airflow and test co nditions as per the thermal co ns ideration section. v i = 53 v. output current derating ? base plate + heat sink output current derating ? cold wa ll sealed box 0 5 10 15 20 25 30 35 02 04 06 08 01 00 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. con v. 0 5 10 15 20 25 30 35 40 02 04 06 08 01 00 [ c] a ta mb 85 c av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. tested w ith plate fin transve rse heatsink, height 0.23 in, p0114 thermal pad. av ailable load current vs . base plate temperature at 85oc ambien t. v i = 53 v. see thermal consideration section.
cui .com date 02/20/2013 page 10 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters electrical specifcation 12.0 v, 39 a / 468 w t p1 , t p3 = -40 to +90oc, v i = 40 to 60 v, sense pins connected to output pins unless otherwise specifed under conditions. typical values given at: t p1 , t p3 = +25c, v i = 53 v, max i o , unless otherwise specifed under conditions. additional c out = 3.9 mf, confguration file: 19010-cda 102 0314/002 note 1: ocp in hic-up mode 2: low esr-value 3: c out = 100 f, external capacitance 4: sink current drawn by external device connected to the rc pin. minimum sink current required guaranteeing activated rc function. parameter conditions/description min typ max units input voltage range (v i ) 40 60 v turn-off input voltage (v ioff ) decreasing input voltage 36 37 38 v turn-on input voltage (v ion ) increasing input voltage 38 39 40 v internal input capacitance (c i ) 18 f output power (p o ) 0 468 w effciency () 50% of max i o max i o 50% of max i o , v i = 48 v max i o , v i = 48 v 96.7 95.7 96.8 95.6 % % % % power dissipation (p d ) max i o 21.2 30.5 w input idling power (p li ) i o = 0 a, v i = 53 v 2.8 w input standby power (p rc ) v i = 53 v (turned off with rc) 0.4 w default switching frequency (f s ) 0-100% of max i o 133 140 147 khz output voltage initial setting and accuracy (v oi ) t p1 = +25c, v i = 53 v, i o = 39 a 11.88 12.0 12.12 v output adjust range (v o ) see operating information 4.0 13.2 v output voltage tolerance band (v o ) 0-100% of max i o 11.76 12.24 v line regulation (v o ) max i o 31 60 mv load regulation (v o ) v i = 53 v, 1-100% of max i o 5 25 mv load transient voltage deviation (v tr ) v i = 53 v, load step 25-75-25% of max i o , di/dt = 1 a/s 0.4 v load transient recovery time (t tr ) v i = 53 v, load step 25-75-25% of max i o , di/dt = 1 a/s 150 s ramp-up time (t r ) - (from 10?90% of v oi ) 10-100% of max i o , t p1 = 25oc, v i = 53 v 8 ms start-up time (t s ) - (from v i connection to 90% of v oi ) 10-100% of max i o , t p1 = 25oc, v i = 53 v 24 ms v i shut-down fall time (t f ) - (from v i off to 10% of v o ) max i o i o = 0 a, c o = 0 mf 3 7 ms s rc start-up time (t rc ) max i o 12 ms rc shut-down fall time (t rc ) - (from rc off to 10% of v o ) max i o i o = 0 a, c o = 0 mf 4.5 7 ms s output current (i o ) 0 39 a current limit threshold (i lim ) v o = 10.8 v, t p1 , t p3 < max t p1 , t p3 41 44 47 a short circuit current (i sc ) t p1 = 25oc, see note 1 14 a recommended capacitive load (c out ) t p1 = 25oc, see note 2 0.1 3.9 6 mf output ripple & noise (v oac ) see ripple & noise section, max i o , see note 3 50 110 mvp-p over voltage protection (ovp) t p1 , t p3 = 25c, v i = 53 v, 10-100% of max i o 15.6 v remote control (rc) sink current (note 4), see operating information trigger level, decreasing rc-voltage trigger level, increasing rc-voltage 2.6 2.9 0.7 ma v v
cui .com date 02/20/2013 page 11 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters ty pical char acteristics 12.0 v, 39 a / 468 w n o i t a p i s s i d r e w o p y c n e i c i f f e 75 80 85 90 95 100 05 10 15 20 25 30 35 40 [a ] [% ] 40 v 48 v 53 v 60 v 0 5 10 15 20 25 05 10 15 20 25 30 35 40 [a ] [w ] 40 v 48 v 53 v 60 v efficiency vs . load current and input vo ltage at t p1 , t p3 = +2 5 c dissipated po we r vs. load current and input vo ltage at t p1 , t p3 = +2 5 c output characteristics current limit characteristics 11.8 11.9 12.0 12.1 12.2 05 10 15 20 25 30 35 40 [a ] [v ] 40 v 48 v 53 v 60 v 3.0 5.0 7.0 9.0 11.0 13.0 39 41 43 45 47 [a ] [v ] 40 v 48 v 53 v 60 v o utput v oltage vs . load current at t p1 , t p3 = +2 5c o utput v oltage vs . load current at i o > ma x i o , t p1 , t p3 = +25c
cui .com date 02/20/2013 page 12 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters ty pical char acteristics 12.0 v, 39 a / 468 w n w o d - t u h s p u - t r a t s start-up enabled by connecti ng v i at: t p1 , t p3 = +25c, v i = 53 v, i o = 39 a resistiv e load. to p trac e: output vo ltage (5 v/div.). bottom trace: input vo ltage (50 v/div.). ti me scale: (10 ms/div.). shut-dow n enabled by disconnecting v i at: t p1 , t p3 = +25c, v i = 53 v, i o =39 a resisti ve load. to p trac e: output vo ltage (5 v/div.). bottom trace: input vo ltage (50 v/div.). ti me scale: (2 ms/div.) . e s n o p s e r t n e i s n a r t d a o l t u p t u o e s i o n & e l p p i r t u p t u o output vo ltage ripple at: t p1 , t p3 = +25c, v i = 53 v, i o = 39 a resistiv e load . tr ace: output vo ltage (5 0 mv/di v. ). ti me scale: (2 s/div.) . output vo ltage response to load current step-change (9.75-29.25-9.75 a) at: t p1 , t p3 =+25c, v i = 53 v, c o = 3.9 mf. to p trac e: output vo ltage (0.5 v/di v. ). bottom trace: output cu rrent (20 a/div.). ti me scale: (0.5 ms/div.). e s n o p s e r t n e i s n a r t e g a t l o v t u p n i output vo ltage response to input voltage transient at: t p1 , t p3 = +25c, v i = 40-60 v, i o = 19,5 a resistiv e load, c o = 3.9 mf to p trac e: output vo ltage (2 v/div.). bottom trace: input vo ltage (20 v/div.). ti me scale: (0.5 ms/div.).
cui .com date 02/20/2013 page 13 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters ty pical char acteristics 12.0 v, 39 a / 468 w output current derating ? open frame 0 5 10 15 20 25 30 35 40 02 04 06 08 01 00 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. conv . av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. output current derating ? base plate thermal resistance ? base plate 0 5 10 15 20 25 30 35 40 02 04 06 08 01 00 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. conv . 0 1 2 3 4 5 6 0. 00 .5 1. 01 .5 2. 02 .5 3. 0[ m/ s] [ c/ w] av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. thermal resistance vs . airspeed measured at the conv erter. tested in w ind tunnel w ith airflo w and test conditions as per the th ermal co ns ideration section. v i = 53 v. output current derating ? base plate + heat sink output current derating ? cold wa ll sealed box 0 5 10 15 20 25 30 35 40 02 04 06 08 01 00 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. conv . 0 5 10 15 20 25 30 35 40 02 04 06 08 01 00 [ c] a ta mb 85 c av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. tested w ith plate fin transve rse heatsink, height 0.23 in, p0114 thermal pad. av ailable load current vs . base plate temperature at 85oc ambien t. v i = 53 v. see thermal consideration section.
cui .com date 02/20/2013 page 14 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters electrical specifcation 12.45 v, 35 a / 415 w t p1 , t p3 = -40 to +90oc, v i = 36 to 75 v, sense pins connected to output pins unless otherwise specifed under conditions. typical values given at: t p1 , t p3 = +25c, v i = 53 v, max i o , unless otherwise specifed under conditions. additional c out = 3.9 mf, confguration file: 19010-cda 102 0314/014 note 1: ocp in hic-up mode 2: low esr-value 3: c out = 100 f, external capacitance 4: sink current drawn by external device connected to the rc pin. minimum sink current required guaranteeing activated rc function. parameter conditions/description min typ max units input voltage range (v i ) 36 75 v turn-off input voltage (v ioff ) decreasing input voltage 32 33 34 v turn-on input voltage (v ion ) increasing input voltage 34 35 36 v internal input capacitance (c i ) 18 f output power (p o ) 0 415 w effciency () 50% of max i o max i o 50% of max i o , v i = 48 v max i o , v i = 48 v 96.2 95.5 96.4 95.5 % % % % power dissipation (p d ) max i o 19.5 29.5 w input idling power (p li ) i o = 0 a, v i = 53 v 3.2 w input standby power (p rc ) v i = 53 v (turned off with rc) 0.4 w default switching frequency (f s ) 0-100% of max i o 133 140 147 khz output voltage initial setting and accuracy (v oi ) t p1 = 25c, v i = 53 v, i o = 0 a 12.415 12.45 12.485 v output adjust range (v o ) see operating information 4.0 13.2 v output voltage tolerance band (v o ) 0-100% of max i o 11.5 12.7 v line regulation (v o ) max i o 20 55 mv load regulation (v o ) v i = 53 v, 0-100% of max i o 500 600 700 mv load transient voltage deviation (v tr ) v i = 53 v, load step 25-75-25% of max i o , di/dt = 1 a/s 0.4 v load transient recovery time (t tr ) v i = 53 v, load step 25-75-25% of max i o , di/dt = 1 a/s 150 s ramp-up time (t r ) - (from 10?90% of v oi ) 10-100% of max i o , t p1 , t p3 = 25oc, v i = 53 v 23 ms start-up time (t s ) - (from v i connection to 90% of v oi ) 10-100% of max i o , t p1 , t p3 = 25oc, v i = 53 v 39 ms v i shut-down fall time (t f ) - (from v i off to 10% of v o ) max i o i o = 0 a, c o = 0 mf 3.6 7 ms s rc start-up time (t rc ) max i o 27 ms rc shut-down fall time (t rc ) - (from rc off to 10% of v o ) max i o i o = 0 a, c o = 0 mf 5.1 7 ms s output current (i o ) 0 35 a current limit threshold (i lim ) v o = 10.8 v, t p1 , t p3 < max t p1 , t p3 37 41 44 a short circuit current (i sc ) t p1 , t p3 = 25oc, see note 1 12 a recommended capacitive load (c out ) t p1 , t p3 = 25oc, see note 2 0.1 3.5 6 mf output ripple & noise (v oac ) see ripple & noise section, max i o , see note 3 60 150 mvp-p over voltage protection (ovp) t p1 , t p3 = 25c, v i = 53 v, 10-100% of max i o 15.6 v remote control (rc) sink current (note 4), see operating information trigger level, decreasing rc-voltage trigger level, increasing rc-voltage 2.6 2.9 0.7 ma v v
cui .com date 02/20/2013 page 15 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters ty pical char acteristics 12.45 v, 63 a / 747 w, tw o products in parallel n o i t a p i s s i d r e w o p y c n e i c i f f e 75 80 85 90 95 10 0 01 02 03 04 05 06 0[ a] [% ] 36 v 48 v 53 v 75 v 0 5 10 15 20 25 30 35 40 45 01 02 03 04 05 06 0[ a] [w ] 36 v 48 v 53 v 75 v efficiency vs . load current and input vo ltage at t p1 , t p3 = +2 5 c dissipated pow er vs. load current and input vo ltage at t p1 , t p3 = +2 5 c output characteristics current limit characteristics 11 .8 11 .9 12 .0 12 .1 12 .2 12 .3 12 .4 12 .5 01 02 03 04 05 06 0[ a] [v ] 36 v 48 v 53 v 75 v 3. 0 5. 0 7. 0 9. 0 11.0 13.0 63 65 67 69 71 73 75 77 79 81 83 [a ] [v ] 36 v 48 v 53 v 75 v o utput v oltage vs . load current at t p1 , t p3 = +2 5c o utput v oltage vs . load current at i o > ma x i o , t p1 , t p3 = +25c start-up output load transient respons e start-up enabled by connecti ng v i at: t p1 , t p3 = +25c, v i = 53 v, i o = 63 a resistiv e load. to p trac e: output vo ltage (5 v/div.). bottom trace: input vo ltage (50 v/div.). ti me scale: (10 ms/div.). output vo ltage response to load current step-change (15.8-47.3-15.8 a) at: t p1 , t p3 =+25c, v i = 53 v, c o = 3.5 mf. to p trac e: output vo ltage (0.5 v/di v. ). bottom trace: output cu rrent (20 a/div.). ti me scale: (0.5 ms/div.).
cui .com date 02/20/2013 page 16 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters ty pical char acteristics 12.45 v, 35 a / 415 w output current derating ? open frame 0 5 10 15 20 25 30 35 02 04 06 08 01 00 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. co nv . av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. output current derating ? base plate thermal resistance ? base plate 0 5 10 15 20 25 30 35 02 04 06 08 01 00 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. conv . 0 1 2 3 4 5 6 0.00 .5 1. 01 .5 2. 02 .5 3.0[ m/ s] [ c/ w] av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. thermal resistance vs . airspeed measured at the conv erter. tested in w ind tunnel wi th airflow and test co nditions as per the thermal co ns ideration section. v i = 53 v. output current derating ? base plate + heat sink output current derating ? cold wa ll sealed box 0 5 10 15 20 25 30 35 02 04 06 08 0 100 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. con v. 0 5 10 15 20 25 30 35 40 02 04 06 08 01 00 [ c] a ta mb 85 c av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. tested w ith plate fin transve rse heatsink, height 0.23 in, p0114 thermal pad. av ailable load current vs . base plate temperature at 85oc ambien t. v i = 53 v. see thermal consideration section.
cui .com date 02/20/2013 page 17 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters electrical specifcation 12.45 v, 39 a / 462 w t p1 , t p3 = -40 to +90oc, v i = 40 to 60 v, sense pins connected to output pins unless otherwise specifed under conditions. typical values given at: t p1 , t p3 = +25c, v i = 53 v, max i o , unless otherwise specifed under conditions. additional c out = 3.9 mf, confguration file: 19010-cda 102 0314/017 note 1: ocp in hic-up mode 2: low esr-value 3: c out = 100 f, external capacitance 4: sink current drawn by external device connected to the rc pin. minimum sink current required guaranteeing activated rc function. parameter conditions/description min typ max units input voltage range (v i ) 40 60 v turn-off input voltage (v ioff ) decreasing input voltage 36 37 38 v turn-on input voltage (v ion ) increasing input voltage 38 39 40 v internal input capacitance (c i ) 18 f output power (p o ) 0 462 w effciency () 50% of max i o max i o 50% of max i o , v i = 48 v max i o , v i = 48 v 96.7 95.7 96.8 95.6 % % % % power dissipation (p d ) max i o 21.0 30.5 w input idling power (p li ) i o = 0 a, v i = 53 v 2.8 w input standby power (p rc ) v i = 53 v (turned off with rc) 0.4 w default switching frequency (f s ) 0-100% of max i o 133 140 147 khz output voltage initial setting and accuracy (v oi ) t p1 = 25c, v i = 53 v, i o = 0 a 12.415 12.45 12.485 v output adjust range (v o ) see operating information 4.0 13.2 v output voltage tolerance band (v o ) 0-100% of max i o 11.5 12.7 v line regulation (v o ) max i o 31 60 mv load regulation (v o ) v i = 53 v, 0-100% of max i o 500 600 700 mv load transient voltage deviation (v tr ) v i = 53 v, load step 25-75-25% of max i o , di/dt = 1 a/s 0.4 v load transient recovery time (t tr ) v i = 53 v, load step 25-75-25% of max i o , di/dt = 1 a/s 150 s ramp-up time (t r ) - (from 10?90% of v oi ) 10-100% of max i o , t p1 = 25oc, v i = 53 v 23 ms start-up time (t s ) - (from v i connection to 90% of v oi ) 10-100% of max i o , t p1 = 25oc, v i = 53 v 39 ms v i shut-down fall time (t f ) - (from v i off to 10% of v o ) max i o i o = 0 a, c o = 0 mf 3 7 ms s rc start-up time (t rc ) max i o 27 ms rc shut-down fall time (t rc ) - (from rc off to 10% of v o ) max i o i o = 0 a, c o = 0 mf 4.5 7 ms s output current (i o ) 0 39 a current limit threshold (i lim ) v o = 10.8 v, t p1 , t p3 < max t p1 , t p3 41 44 47 a short circuit current (i sc ) t p1 = 25oc, see note 1 14 a recommended capacitive load (c out ) t p1 = 25oc, see note 2 0.1 3.9 6 mf output ripple & noise (v oac ) see ripple & noise section, max i o , see note 3 50 110 mvp-p over voltage protection (ovp) t p1 , t p3 = 25c, v i = 53 v, 10-100% of max i o 15.6 v remote control (rc) sink current (note 4), see operating information trigger level, decreasing rc-voltage trigger level, increasing rc-voltage 2.6 2.9 0.7 ma v v
cui .com date 02/20/2013 page 18 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters ty pical char acteristics 12.45 v, 70 a / 830 w, tw o products in parallel n o i t a p i s s i d r e w o p y c n e i c i f f e 75 80 85 90 95 10 0 01 02 03 04 05 06 07 0[ a] [% ] 40 v 48 v 53 v 60 v 0 5 10 15 20 25 30 35 40 45 01 02 03 04 05 06 07 0 [a ] [w ] 40 v 48 v 53 v 60 v efficiency vs . load current and input vo ltage at t p1 , t p3 = +2 5 c dissipated pow er vs. load current and input vo ltage at t p1 , t p3 = +2 5 c output characteristics current limit characteristics 11.8 11.9 12.0 12.1 12.2 12.3 12.4 12.5 01 02 03 04 05 06 07 0[ a] [v ] 40 v 48 v 53 v 60 v 3. 0 5. 0 7. 0 9. 0 11. 0 13. 0 70 75 80 85 90 [a ] [v ] 40 v 48 v 53 v 60 v o utput v oltage vs . load current at t p1 , t p3 = +2 5c o utput v oltage vs . load current at i o > ma x i o , t p1 , t p3 = +25c start-up output load transient respons e start-up enabled by connecti ng v i at: t p1 , t p3 = +25c, v i = 53 v, i o = 70 a resistiv e load . to p trac e: output vo ltage (5 v/div.). bottom trace: input vo ltage (50 v/div.). ti me scale: (10 ms/div.) . output vo ltage response to load current step-change (17.5-52.5-17.5 a) at: t p1 , t p3 =+25c, v i = 53 v, c o = 3.9 mf to p trac e: output vo ltage (0.5 v/di v. ). bottom trace: output cu rrent (20 a/div.). ti me scale: (0.5 ms/div.).
cui .com date 02/20/2013 page 19 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters ty pical char acteristics 12.45 v, 39 a / 462 w output current derating ? open frame 0 5 10 15 20 25 30 35 40 02 04 06 08 0 100 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. conv . av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. output current derating ? base plate thermal resistance ? base plate 0 5 10 15 20 25 30 35 40 02 04 06 08 01 00 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. conv . 0 1 2 3 4 5 6 0. 00 .5 1. 01 .5 2. 02 .5 3. 0[ m/ s] [ c/ w] av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. thermal resistance vs . airspeed measured at the conv erter. tested in w ind tunnel w ith airflo w and test conditions as per the th ermal co ns ideration section. v i = 53 v. output current derating ? base plate + heat sink output current derating ? cold wa ll sealed box 0 5 10 15 20 25 30 35 40 02 04 06 08 01 00 [ c] [a ] 3. 0 m/ s 2. 0 m/ s 1. 5 m/ s 1. 0 m/ s 0. 5 m/ s na t. conv . 0 5 10 15 20 25 30 35 40 02 04 06 08 01 00 [ c] a ta mb 85 c av ailable load current vs . ambient air temperature and airflow at v i = 53 v. see thermal consideration section. tested w ith plate fin transve rse heatsink, height 0.23 in, p0114 thermal pad. av ailable load current vs . base plate temperature at 85oc ambien t. v i = 53 v. see thermal consideration section.
cui .com date 02/20/2013 page 20 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters emc specifcation conducted emi input terminal value (typ) conducted emi measured according to en55022, cispr 22 and fcc part 15j (see test set-up). the fundamental switching frequency is 140 khz for nqb at v i = 53 v, max i o . emi without filter suggested external input flter in order to meet class b in en 55022, cispr 22 and fcc part 15j. optional external flter for class b l1 c1 c2 c3 c4 c5 r - + mo dule + - 0 0 l2 filter components: c1 = 1 f c2 = 1 f+220 f c3 = 1 f+220 f c4,c5 = 2.2 nf l1 = 810 h l2 = 810 h emi with filter test set-up the radiated emi performance of the product will depend on the pwb layout and ground layer design. it is also important to consider the stand-off of the product. if a ground layer is used, it should be connected to the output of the product and the equipment ground or chassis. a ground layer will increase the stray capacitance in the pwb and improve the high frequency emc performance. layout recommendations output ripple and noise measured according to fgure below. output ripple and noise output ripple and noise test setup
cui .com date 02/20/2013 page 21 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters operating information this product is equipped with a pmbus interface. the product incorporates a wide range of readable and confgurable power management features that are simple to implement with a minimum of external components. additionally, the product includes protection features that continuously safeguard the load from damage due to unexpected system faults. a fault is also shown as an alert on the salert pin. the following product parameters can continuously be monitored by a host: input voltage, output voltage/current, duty cycle and internal temperature. the product is delivered with a default confguration suitable for a wide range operation in terms of input voltage, output voltage, and load. the confguration is stored in an internal non-volatile memory (nvm). all power management functions can be reconfgured using the pmbus interface. please contact your local cui power modules representative for design support of custom confgurations or appropriate sw tools for design and down-load of your own confgurations. power management overview the nqb consists of two different product families designed for two different input voltage ranges, 36 to 75 vdc and 40 to 60 vdc, see ordering information. the input voltage range 36 to 75 vdc meets the requirements of the european telecom standard ets 300 132-2 for normal input voltage range in C48 and C60 vdc systems, -40.5 to -57.0 v and C50.0 to -72 v respectively. at input voltages exceeding 75 v, the power loss will be higher than at normal input voltage and t p1 must be limited to absolute max +125c. the absolute maximum continuous input voltage is 80 vdc. the input voltage range 40 to 60 vdc meets the requirements for normal input voltage range in -48 v systems, -40.5 to -57.0 v. at input voltages exceeding 60 v, the power loss will be higher than at normal input voltage and t p1 must be limited to absolute max +125c. the absolute maximum continuous input voltage is 65 vdc. input voltage the product monitors the input voltage and will turn on and turn off at predetermined levels. the minimum hysteresis between turn on and turn off input voltage is 2 v. the turn on and turn off levels of the product can be reconfgured using the pmbus interface turn-off input voltage the products are ftted with a confgurable remote control function. the primary remote control is referenced to the primary negative input connection (-in). the rc function allows the converter to be turned on/off by an external device like a semiconductor or mechanical switch. the rc pin has an internal pull up resistor. the remote control functions can also be confgured using the pmbus. remote control (rc) the device should be capable of sinking 0.7 ma. when the rc pin is left open, the voltage generated on the rc pin is max 6 v. the standard product is provided with negative logic remote control and will be off until the rc pin is connected to the -in. to turn on the product the voltage between rc pin and -in should be less than 1 v. to turn off the product the rc pin should be left open for a minimum of time 150 s, the same time requirement applies when the product shall turn on. in situations where it is desired to have the product to power up automatically without the need for control signals or a switch, the rc pin can be wired directly to Cin or disabled via the 0xe3 command. the logic option for the primary remote control is confgured via 0xe3 command using the pmbus. the ctrl-pin can be confgured as remote control via the pmbus interface. in the default confguration the ctrl- pin is disabled and foating. the output can be confgured to internal pull-up to 3.3 v using the mfr_multi_pin_ config (0xf9) pmbus command. the ctrl-pin can be left open when not used. the logic options for the secondary remote control can be positive or negative logic. the logic option for the secondary remote control is confgured via on_off_config (0x02) command using the pmbus interface, see also mfr_multi_pin_config section. remote control (secondary side) the impedance of both the input source and the load will interact with the impedance of the product. it is important that the input source has low characteristic impedance. minimum recommended external input capacitance is 100 f. the performance in some applications can be enhanced by addition of external capacitance as described under external decoupling capacitors. input and output impedance when powering loads with signifcant dynamic current requirements, the voltage regulation at the point of load can be improved by addition of decoupling capacitors at the load. the most effective technique is to locate low esr ceramic and electrolytic capacitors as close to the load as possible, using several parallel capacitors to lower the effective esr. the ceramic capacitors will handle high- frequency dynamic load changes while the electrolytic capacitors are used to handle low frequency dynamic load changes. ceramic capacitors will also reduce any high frequency noise at the load. it is equally important to use low resistance and low inductance pwb layouts and cabling. external decoupling capacitors will become part of the products control loop. the control loop is optimized for a wide range of external capacitance and the maximum recommended value that could be used without any additional analysis is found in the electrical specifcation. the esr of the capacitors is a very important parameter. stable operation is guaranteed with a verifed esr value of external decoupling capacitors
cui .com date 02/20/2013 page 22 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters >10 m? across the output connections. for further information please contact your local cui power modules representative. the nqb, dls products are variants that can be connected in parallel. the products have a pre-confgured voltage droop: the stated output voltage set point is at no load. the output voltage will decrease when the load current is increased. the voltage will droop 0.6 v while load reaches max load. this feature allows the products to be connected in parallel and share the current with 10% accuracy. up to 90% of max output current can be used from each product. when running dls-products in parallel command (0xf9) must be set according to mfr_multi_pin_config. to prevent unnecessary current stress, changes of the output voltage must be done with the output disabled. this must be considered for all commands that affect the output voltage. parallel operation (droop load share, dls) vo lt ag e re gu la ti on dls pr od uc ts 11. 6 11. 8 12. 0 12. 2 12. 4 12. 6 12. 8 01 02 03 04 05 06 07 0 ou tp ut cu rre nt [a ] ou t put vo lt age [v ] mo du le 1 mo du le 2 mo du le 1+ 2 the nqb products have a feed forward function implemented that can handle sudden input voltage changes. the output voltage will be regulated during an input transient and will typically stay within 10% when an input transient is applied. feed forward capability the product provides a pmbus digital interface that enables the user to confgure many aspects of the device operation as well as monitor the input and output parameters. please contact your local cui power modules representative for appropriate sw tools to down-load new confgurations. pmbus confguration and support the output voltage of the product can be reconfgured using the pmbus interface. output voltage adjust using pmbus these controls allow the output voltage to be momentarily adjusted, either up or down, by a nominal 10%. this provides a convenient method for dynamically testing the operation of the load circuit over its supply margin or range. it can also be used to verify the function of supply voltage supervisors. the margin up and down levels of the product can be re- confgured using the pmbus interface. margin up/down controls the default rise time of the ramp up is 10 ms. when starting by applying input voltage the control circuit boot- up time adds an additional 15 ms delay. the soft-start power up of the product can be reconfgured using the pmbus interface. the dls variants have a pre-confgured ramp up time of 25 ms. soft-start power up the product has remote sense that can be used to compensate for voltage drops between the output and the point of load. the sense traces should be located close to the pwb ground layer to reduce noise susceptibility. the remote sense circuitry will compensate for up to 10% voltage drop between output pins and the point of load. if the remote sense is not needed +sense should be connected to +out and -sense should be connected to -out. to be able to use remote sense the converter must be equipped with a communication interface. remote sense the products are protected from thermal overload by an internal temperature shutdown protection. when t p1 as defned in thermal consideration section is exceeded the product will shut down. the product will make continuous attempts to start up (non-latching mode) and resume normal operation automatically when the temperature has dropped below the temperature threshold set in the command ot_warn_limit (0x51); the hysteresis is defned in general electrical specifcation. the otp and hysteresis of the product can be re-confgured using the pmbus interface. the product has also an under temperature protection. the otp and utp fault limit and fault response can be confgured via the pmbus. note: using the fault response continue without interruption may cause permanent damage to the product temperature protection (otp, utp) the product includes over voltage limiting circuitry for protection of the load. the default ovp limit is 30% above the nominal output voltage. if the output voltage exceeds the ovp limit, the product can respond in different ways. the default response from an over voltage fault is to immediately shut down. the device will continuously check for the presence of the fault condition, and when the fault condition no longer exists the device will be re-enabled. the ovp fault level and fault response can be re- confgured using the pmbus interface. over voltage protection (ovp)
cui .com date 02/20/2013 page 23 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters the product includes current limiting circuitry for protection at continuous overload. the default setting for the product is hic-up mode if the maximum output current is exceeded and the output voltage is below 0.3v out , set in command iout_oc_lv_fault_limit (0x48). above the trip voltage value in command 0x48 the product will continue operate while maintaining the output current at the value set by iout_oc_fault_limit (0x46). the load distribution should be designed for the maximum output short circuit current specifed. droop load share variants (dls) will enter hic-up mode, with a trip voltage, 0.04v out , set in command iout_ oc_lv_fault_limit (0x48). above the trip voltage in command (0x48) the product will continue operate while maintaining the output current at the value set by iout_ oc_fault_limit (0x46). the over current protection of the product can be reconfgured using the pmbus interface. over current protection (ocp) the input of the product can be protected from high input voltage and low input voltage. the over/under-voltage fault level and fault response can be confgured via the pmbus interface. input over/under voltage protection the product has a pre-bias start up functionality and will not sink current during start up if a pre-bias source is present at the output terminals. if the pre-bias voltage is lower than the target value set in vout_command (0x21), the product will ramp up to the target value. if the pre-bias voltage is higher than the target value set in vout_command (0x21), the product will ramp down to the target value and in this case sink current for a limited of time set in the command toff_max_warn_limit (0x66). pre-bias start-up capability the product provides power good (pg) fag in the status word register that indicates the output voltage is within a specifed tolerance of its target level and no fault condition exists. if specifed in section connections, the product also provides a pg signal output. the power good signal is by default confgured as active low, push-pull and can be re-confgured via the pmbus interface. the power good output can be confgured as push-pull or high z when active to permit anding of parallel devices. it is not recommended to use push-pull when paralleling pg-pins, see mfr_multi_pin_config. power good this product does not support synchronization, tracking or external reference. synchronization, tracking and external reference the switching frequency is set to 140 khz as default but this can be reconfgured via the pmbus interface. the product is optimized at this frequency but can run at lower and higher frequency, (125-150 khz). the electrical performance can be affected if the switching frequency is changed. switching frequency adjust using pmbus the mfr_multi_pin_config (0xf9) command enables or disables different functions inside the product. this command can be confgured according to the table for different functions. mfr_multi_pin_config bit 7:6 00 = stand alone 01 = slav e (n/a) 10 = dls 11 = master (n/a) 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 bit 5 powe r good high z wh en acti ve 0 0 0 0 1 1 0 0 0 0 1 1 bit 4 tr acking enabl e (n/a) 0 0 0 0 0 0 0 0 0 0 0 0 bit 3 ex ternal reference (n/a) 0 0 0 0 0 0 0 0 0 0 0 0 bit 2 powe r good enable 0 0 1 1 1 1 0 0 1 1 1 1 bit 1 reserved 1 1 1 1 1 1 0 0 0 0 0 0 bit 0 secondar y remote control pull up/do wn resistor enable 1) 0 1 0 1 0 1 0 1 0 1 0 1 1) w hen not used wi th pmbus, the ctrl input can be internally pulled up or do wn depending on if it is acti ve high or lo w. wh en acti ve lo w it wi ll be pulled up and vi ce ve rsa dls, pm bus c ontro l (0x8 2) dls, sec rc w / pull up/down (0x83) dls, po wer go od push-pull, pm bus c ontro l (0x86) dls, po wer go od push-pull, sec rc w/ pull up/ dow n (0 x87) dls, power good high z when active, pmbus control (0xa6) dls, power good high z when active, sec rc w/ pull up/ dow n (0 xa7) stan d al on e, pm bus co ntro l (0x00) stand alone, sec rc w/ pull up/down (0x01) stan d al on e, powe r good push-pull, pmbus contro l (0x04) stan d al on e, powe r good push-pull, sec rc w/ pull up/ dow n (0 x05) stand alone, powe r good high z when active, pm bus co ntrol (0x24) stand alone, powe r good high z when active, sec rc w/ pull up/down (0x25) the mfr_multi_pin_config can be reconfgured using the pmbus interface. default confguration is set to power good push-pull (0x04) for stand alone variants and dls power good push-pull (0x86) for droop load share variants. this product has two data storage set: default data (cui factory) and user data. the user data sets priority is higher than the default data. the user data area is empty while shipped to customer. after boot-up, if the controller found no data stored in user data area, it will load default data instead. customer can change the ram data and store the changes into fash memory by pmbus store_user_all, next power cycle will load the user data into ram for execute. store_default_all is write protected to ensure the factory settings is always available for recovery. user customized settings
cui .com date 02/20/2013 page 24 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters the nqb products are designed to be fully regulated within the plotted area. operating outside this area is not recommended. output voltage regulation 12.0 12.2 12.4 12.6 12.8 13.0 13.2 13.4 35 45 55 65 75 vi n [v ] v out [v ] vin range: 36-75vdc 12.0 12.2 12.4 12.6 12.8 13.0 13.2 13.4 35 40 45 50 55 60 65 vi n [v ] vo ut [v ] vin range:40-60vdc thermal consideration the product is designed to operate in different thermal environments and suffcient cooling must be provided to ensure reliable operation. for products mounted on a pwb without a heat sink attached, cooling is achieved mainly by conduction, from the pins to the host board, and convection, which is dependant on the airfow across the product. increased airfow enhances the cooling of the product. the output current derating graph found in the output section for each model provides the available output current vs. ambient air temperature and air velocity at v i =53 v. the product is tested on a 254 x 254 mm, 35 m (1 oz), 16-layer test board mounted vertically in a wind tunnel with a cross-section of 608 x 203 mm. general for products with base plate used in a sealed box/cold wall application, cooling is achieved mainly by conduction through the cold wall. the output current derating graphs are found in the output section for each model. the product is tested in a sealed box test set up with ambient temperatures 85, 55 and 25c. the product operating temperature is used to monitor the temperature of the product, and proper thermal conditions can be verifed by measuring the temperature at positions p1, p2, p3 and p4. the temperature at these positions (t p1 , t p2 , t p3 , t p4 ) should not exceed the maximum temperatures in the table below. the number of measurement points may vary with different thermal design and topology. temperatures above maximum t p1 , measured at the reference point p1 (t p3 / p3 for base plate versions) are not allowed and may cause permanent damage. defnition of product operating temperature position description max temperature p1 pwb (reference point, open frame) t p1 =125o c p2 opto-coupler t p2 =105o c p3 pwb (reference point for base-plate version) t p3 =125o c p4 primary mo sfet t p4 =125o c
cui .com date 02/20/2013 page 25 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters top view bottom view for products with base plate the maximum allowed ambient temperature can be calculated by using the thermal resistance. 1. the power loss is calculated by using the formula ((1/) - 1) output power = power losses (p d ). = effciency of product. e.g. 95 % = 0.95 2. find the thermal resistance (r th ) in the thermal resistance graph found in the output section for each model. note that the thermal resistance can be signifcantly reduced if a heat sink is mounted on the top of the base plate. calculate the temperature increase (t). t = r th x p d 3. max allowed ambient temperature is: max t p1 - t. e.g. nqb-468 at 2m/s: 1. ((1/0.95) - 1) 468 w = 24.6 w 2. 19.5 w 2.8c/w = 69.0c} 3. 125 c - 69.0c = max ambient temperature is 56c the actual temperature will be dependent on several factors such as the pwb size, number of layers and direction of airfow. ambient temperature calculation (best air fow direction is from positive to negative pins.) connections (top view) pin designation function 1 +in positive input 2 rc remote control 3 case case to gnd (optional) 4 -in negative input 5 -out negative output 6 s+ positive remote sense 7 s- negative remote sense 8 sa0 address pin 0 9 sa1 address pin 1 10 scl pmbus clock 11 sda pmbus data 12 pg po we r good output 13 dgnd pmbus ground 14 salert pmbus alert signal 15 ctrl pmbus remote control 16 +out positive output
cui .com date 02/20/2013 page 26 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters this product provides a pmbus digital interface that enables the user to confgure many aspects of the device operation as well as to monitor the input and output voltages, output current and device temperature. the product can be used with any standard two-wire i2c or smbus host device. in addition, the product is compatible with pmbus version 1.2 and includes an salert line to help mitigate bandwidth limitations related to continuous fault monitoring. the product supports 100 khz and 400 khz bus clock frequency only. the pmbus signals, scl, sda and salert require passive pull-up resistors as stated in the smbus specifcation. pull-up resistors are required to guarantee the rise time as follows: eq. 7 where rp is the pull-up resistor value and cp is the bus load. the maximum allowed bus load is 400 pf. the pull- up resistor should be tied to an external supply between 2.7 to 5.5 v, which should be present prior to or during power-up. if the proper power supply is not available, voltage dividers may be applied. note that in this case, the resistance in the equation above corresponds to parallel connection of the resistors forming the voltage divider. it is recommended to always use pec (packet error check) when communicating via pmbus. for these products it is a requirement to use pec when using send byte to the device, for example command restore_default_all. monitoring via pmbus pmbus interface a system controller (host device) can monitor a wide variety of parameters through the pmbus interface. the controller can monitor fault conditions by monitoring the salert pin, which will be asserted when any number of pre-confgured fault or warning conditions occur. the system controller can also continuously monitor any number of power conversion parameters including but not limited to the following: ? input voltage ? output voltage ? output current ? internal junction temperature ? switching frequency (monitors the set value not actual frequency) ? duty cycle us c r p p 1 = software tools for design and production for these products cui provides software for confguring and monitoring via the pmbus interface. for more information please contact your local cui sales representative. pmbus addressing the following fgure and table show recommended resistor values with min and max voltage range for hard-wiring pmbus addresses (series e12, 1% tolerance resistors suggested): schematic of connection of address resistors . 0 10 1 22 2 33 3 47 4 68 5 100 6 150 7 220 r sa0 /r sa1 [k] sa0/sa1 index the sa0 and sa1 pins can be confgured with a resistor to gnd according to the following equation. pmbus address = 8 x (sa0value) + (sa1 value) if the calculated pmbus address is 0, 11 or 12, pmbus address 127 is assigned instead. from a system point of view, the user shall also be aware of further limitations of the addresses as stated in the pmbus specifcation. it is not recommended to keep the sa0 and sa1 pins left open. i 2 c/smbus - timing setup and hold times timing diagram the setup time, tset, is the time data, sda, must be stable before the rising edge of the clock signal, scl. the hold time thold, is the time data, sda, must be stable after the rising edge of the clock signal, scl. if these times are violated incorrect data may be captured or meta-stability may occur and the bus communication may fail. when confguring the product, all standard smbus protocols must be followed, including clock stretching. additionally, a bus-free time delay between every smbus transmission (between every stop & start condition) must occur. refer to the smbus specifcation, for smbus electrical and timing
cui .com date 02/20/2013 page 27 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters requirements. note that an additional delay of 5 ms has to be inserted in case of storing the ram content into the internal non-volatile memory. pmbus commands the products are pmbus compliant. the following table lists the implemented pmbus read commands. for more detailed information see pmbus power system management protocol specifcation; part i C general requirements, transport and electrical interface and pmbus power system management protocol; part ii C command language. designation cmdp rot standard pmbus commands control commands o n h 1 0 n o i t a r e p o o n h 2 0 g i f n o c _ f f o _ n o o n h 0 1 t c e t o r p _ e t i r w output commands o n h 0 2 e d o m _ t u o v o n h 1 2 d n a m m o c _ t u o v o n h 2 2 m i r t _ t u o v s e y h 3 2 t e s f f o _ l a c _ t u o v o n h 4 2 x a m _ t u o v o n h 5 2 h g i h _ n i g r a m _ t u o v o n h 6 2 w o l _ n i g r a m _ t u o v vout _t ransit ion_rat e 27h no s e y h 9 2 p o o l _ e l a c s _ t u o v vout_scale_monitor 2ah yes o n h 2 3 y t u d _ x a m frequency_switch 33h no o n h 5 3 n o _ n i v o n h 6 3 f f o _ n i v s e y h 8 3 n i a g _ l a c _ t u o i s e y h 9 3 t e s f f o _ l a c _ t u o i fault commands vout_ov_fault_limit 40h no vout_ov_fault_response 41h no vout_ov_warn_limit 42h no vout_uv_warn_limit 43h no vout_uv_fault_limit 44h no vout_uv_fault_response 45h no iout_oc_fault_limit 46h no designation cmdp ro t iout_oc_fault_response 47h no iout_oc_lv_fault_limit 48h no iout_oc_warn_limit 4ah no o n h f 4 t i m i l _ t l u a f _ t o ot_fault_response 50h no o n h 1 5 t i m i l _ n r a w _ t o o n h 2 5 t i m i l _ n r a w _ t u o n h 3 5 t i m i l _ t l u a f _ t u ut_fault_response 54h no o n h 5 5 t i m i l _ t l u a f _ v o _ n i v vin_ov_fault_response 56h no o n h 7 5 t i m i l _ n r a w _ v o _ n i v o n h 8 5 t i m i l _ n r a w _ v u _ n i v o n h 9 5 t i m i l _ t l u a f _ v u _ n i v vin_uv_fault_response 5ah no o n h e 5 n o _ d o o g _ r e w o p o n h f 5 f f o _ d o o g _ r e w o p ti me setting commands o n h 0 6 y a l e d _ n o t o n h 1 6 e s i r _ n o t ton_max_fault_limit 62h no ton_max_fault_response 63h no o n h 4 6 y a l e d _ f f o t o n h 5 6 l l a f _ f f o t toff_max_warn_limit 66h no status commands (read only) o n h 3 0 s t l u a f _ r a e l c o n h 8 7 s e t y b _ s u t a t s o n h 9 7 d r o w _ s u t a t s o n h a 7 t u o v _ s u t a t s o n h b 7 t u o i _ s u t a t s o n h c 7 t u p n i _ s u t a t s status_temperature 7dh no status_cml 7eh no o n h f 7 r e h t o _ s u t a t s monitior commands (read only ) o n h 8 8 n i v _ d a e r o n h b 8 t u o v _ d a e r o n h c 8 t u o i _ d a e r read_temperature_1 8dh no read_temperature_2 8eh no o n h 4 9 e l c y c _ y t u d _ d a e r
cui .com date 02/20/2013 page 28 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters designation cmdp rot o n h 5 9 y c n e u q e r f _ d a e r configuration and control commands r 1 k % $ 7 $ ' 5 ( 6 8 identification commands (read only) o n h 8 9 n o i s i v e r _ s u b m p s e y h 9 9 d i _ r f m s e y h a 9 l e d o m _ r f m s e y h b 9 n o i s i v e r _ r f m s e y h c 9 n o i t a c o l _ r f m s e y h d 9 e t a d _ r f m s e y h e 9 l a i r e s _ r f m supervisory commands store_default_all 11h yes restore_default_all 12h no o n h 5 1 l l a _ r e s u _ e r o t s o n h 6 1 l l a _ r e s u _ e r o t s e r o n h 9 1 y t i l i b a p a c product specific commands mfr_power_good_polarity d0h no mfr_vin_scale_monitor d3h yes mfr_select_temp_sensor dch no s e y h d d t e s f f o _ n i v _ r f m mfr_vout_offset_monitor deh yes mfr_temp_offset_int e1h no mfr_remote_temp_cal e2h no o n h 3 e l r t c _ e t o m e r _ r f m mfr_dead_band_delay e5h yes s e y h 7 e f f e o c _ p m e t _ r f m o n h 0 f f f u b _ g u b e d _ r f m mfr_setup_password f1h no mfr_disable_security_once f2h no mfr_dead_band_iout_threshold f3h yes mfr_security_bit_mask f4h yes s e y h 5 f n r u t _ y r a m i r p _ r f m mfr_secondary_turn f6h ye s mfr_ilim_softstart f8h no mfr_multi_pin_config f9h no mfr_dead_band_vin_threshold fah yes mfr_dead_band_vin_iout_hys fbh yes o n h e f t r a t s e r _ r f m note: 1. cmd, is short for command. 2. prot, is short for commands that are protected with security mask.
cui .com date 02/20/2013 page 29 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters mechanical information - hole mount, open frame version
cui .com date 02/20/2013 page 30 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters mechanical information - hole mount, base plate version
cui .com date 02/20/2013 page 31 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters mechanical information - surface mount version
cui .com date 02/20/2013 page 32 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters soldering information - surface mounting minimum pin temperature recommendations the surface mount product is intended for forced convection or vapor phase refow soldering in snpb and pb-free processes. the refow profle should be optimised to avoid excessive heating of the product. it is recommended to have a suffciently extended preheat time to ensure an even temperature across the host pwb and it is also recommended to minimize the time in refow. a no-clean fux is recommended to avoid entrapment of cleaning fuids in cavities inside the product or between the product and the host board, since cleaning residues may affect long time reliability and isolation voltage. average ramp-up (t pr od uct )3 c/s ma x3 c/s ma x ty pi ca l so ld er me lt in g (liq uidu s) te mp er at ur e t1 83 c l 221 c mini mu m re fl ow ti me ab ov e t l 60 s6 0 s mini mu m pi n te m per at ur et 210 c pi n 235 c peak pr od uc t te mp er at ur et 225 c produc t 260 c average ramp-dow n (t pr od uct )6 c/s ma x6 c/s ma x ma xi mu m ti me 25 c to pe ak 6 mi nute s 8 mi nute s t pr od uct ma xi mu m t pi n mi ni mu m t i m e n i p pr of ile pr od uc t pr of ile t l ti me in re fl ow ti me in pr eh ea t / so ak zo ne ti me 25 c to pe ak t e m p e r a t u r e general reflow process specifications snpb eutectic pb-free pin number 5 chosen as reference location for the minimum pin temperature recommendation since this will likely be the coolest solder joint during the refow process. snpb solder processes for snpb solder processes, a pin temperature (tpin) in excess of the solder melting temperature, (tl, 183c for sn63pb37) for more than 60 seconds and a peak temperature of 220c is recommended to ensure a reliable solder joint. for dry packed products only: depending on the type of solder paste and fux system used on the host board, up to a recommended maximum temperature of 245c could be used, if the products are kept in a controlled environment (dry pack handling and storage) prior to assembly. lead-free (pb-free) solder processes for pb-free solder processes, a pin temperature (t pin ) in excess of the solder melting temperature (t l , 217 to 221c for snagcu solder alloys) for more than 60 seconds and a peak temperature of 245c on all solder joints is recommended to ensure a reliable solder joint. maximum product temperature requirements top of the product pwb near pin 2 is chosen as reference location for the maximum (peak) allowed product temperature (t product ) since this will likely be the warmest part of the product during the refow process. snpb solder processes for snpb solder processes, the product is qualifed for msl 1 according to ipc/jedec standard j std 020c. during refow t product must not exceed 225 c at any time. pb-free solder processes for pb-free solder processes, the product is qualifed for msl 3 according to ipc/jedec standard j-std-020c. during refow t product must not exceed 260 c at any time. dry pack information products intended for pb-free refow soldering processes are delivered in standard moisture barrier bags according to ipc/jedec standard j std 033 (handling, packing, shipping and use of moisture/refow sensitivity surface mount devices). using products in high temperature pb-free soldering processes requires dry pack storage and handling. in case the products have been stored in an uncontrolled environment and no longer can be considered dry, the modules must be baked according to j std 033. thermocoupler attachment top of pwb near pin 2 for measurement of maximum product temperature, t product pin 5 for measurement of minimum pin (solder joint ) temperature, t pin
cui .com date 02/20/2013 page 33 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters soldering information - hole mounting the hole mounted product is intended for plated through hole mounting by wave or manual soldering. the pin temperature is specifed to maximum to 270c for maximum 10 seconds. a maximum preheat rate of 4c/s and maximum preheat temperature of 150c is suggested. when soldering by hand, care should be taken to avoid direct contact between the hot soldering iron tip and the pins for more than a few seconds in order to prevent overheating. a no-clean fux is recommended to avoid entrapment of cleaning fuids in cavities inside the product or between the product and the host board. the cleaning residues may affect long time reliability and isolation voltage. delivery package information the products are delivered in antistatic injection molded trays (jedec design guide 4.10d standard) and in antistatic trays. tr ay specif ic at io ns ?s md ma te ri al anti stat ic pp e surface resistance 10 5 < oh m/square < 10 bakability 12 the trays can be bake d at ma xi mu m 125c for 48 hour s tr ay thi cknes s 14.5 0m m0 .571 [i nc h] box capaci ty 20 produc ts (2 full tr ays/bo x) tr ay weight 125g em pt y, 574g full tray jedec standard tray for 2x5 = 10 products. all dimensions in mm [inch] tolerances: x.x 0.26 [0.01], x.xx 0.13 [0.005] note: pick up positions refer to center of pocket. see mechanical drawing for exact location on product.
cui .com date 02/20/2013 page 34 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters resistance bakabilit y the trays are not ba keable tr ay capacity 20 converters/tra y box capaci ty 20 product s (1 full tr ay/box ) we ight produc t ?o pen fr am e 1100 g full tr ay, 140g em pt y tr ay produc t ?b as e plat e option 1480 g full tray, 140 g em pty tray ma te ri al pe fo am surface 10 5 < oh m/square < 10 12 tray specifications - th
cui .com date 02/20/2013 page 35 of 36 cui inc series : nqb-d description : fully regulated advanced bus converters product qualifcation specifcation characteristic s ex ternal vis ual in spection ip c- a-610 change of te mperatur e (tem peratur e cy cling) ie c 60068-2-14 na te m perature rang e num ber of cy cl es dw ell/transfer ti me -40 to 100c 500 15 mi n/0-1 mi n cold (in operation) ie c 60068-2-1 ad te m perature t dura tion a -45 c 72 h da mp heat ie c 60068-2-67 cy te m peratur e hu mi di ty dura tion 85 c 85 % rh 1000 hours dry heat ie c 60068-2- 2b d te m peratur e dura tion 125c 1000 h elec tr ostati c disc harge su sc eptib ilit y ie c 61340-3-1, jesd 22 -a 114 ie c 61340-3-2, jesd 22 -a 115 hu ma n body m odel (h bm ) ma ch ine m odel (mm) clas s 2, 2000 v clas s 3, 200 v im me rs ion in cl eaning solvent si ec 6006 8-2-45 xa , me thod 2 wa te r glycol et her isopr opyl alc ohol 55 c 35c 35 c mec hani ca l shoc ki ec 60068 -2-27 ea peak acceleration dura tion 100 g 6 ms mo isture reflow se ns itiv it y j- st d-020 c 1 level 1 (snpb-eut ec ti c) level 3 (pb free) 225c 260c operational li fe te st mi l-std-202g, me thod 108 ad uration 1000 h re si st anc e to solder ing hea t ie c 60068-2-20 tb, me thod 1a 2 solder te mperatur e dura tion 270c 10-13 s robustness of te rm inations ie c 60068-2-21 te st ua 1 ie c 60068-2-21 te st ue 1 through hole m ount products surfac e m ount product s all lead s all lead s solderability ie c 60068-2-58 te st td 1 ie c 60068-2-20 te st ta precondi tioning 2 te m perature, snpb eu te ct ic te m perature, pb-fre e precondi tioning te m perature, snpb eu te ct ic te m perature, pb-fre e 150c dry ba ke 16 h 215 c 235 c stea m agein g 235c 245 c vibration, br oad band rando mi ec 60068-2-64 fh , me thod 1 frequency spectral density dura tion 10 to 500 hz 0.07 g 2 10 mi n in eac h directio n /h z notes: 1. only for products intended for refow soldering (surface mount products) 2. only for products intended for wave soldering (plated through hole products)
cui inc series : nqb-d description : fully regulated advanced bus converters date 02/20/2013 page 36 of 36 novum is a trademark of cui. pmbus is a trademark of smif, inc. all other trademarks are the property of their respective owners. cui offers a two (2) year limited warranty. complete warranty information is listed on our website. cui reserves the right to make changes to the product at any time without notice. information provided by cui is believed to be accurate and reliable. however, no responsibility is assumed by cui for its use, nor for any infringements of patents or other rights of third parties which may result from its use. cui products are not authorized or warranted for use as critical components in equipment that requires an extremely high level of reliability. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. headquarters 20050 sw 112th ave. tualatin, or 97062 800.275.4899 fax 503.612.2383 cui .com techsupport@cui.com rev. description date 1.0 initial release 02/20/2013 the revision history provided is for informational purposes only and is believed to be accurate. revision history

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